FPGA Synthesizer 2
Port To Xilinx Spartan 3E Starter Kit
There has been a lot of interest in this synthesiser implementation. However, due to its implementation on proprietry hardware, it couldn't really be taken much further. This situation changed when Xilinx released their Spartan 3E starter kit.
The release of this cheap FGPA development platform prompted many members of the FPGA Synth mailing list, myself included, to purchase one.
Further details of the synthesiser can be found in this page.
I used two DCMs (the DCM constraints meant I couldn't do it using one) on the Spartan 3E (out of 4 available) to create the required clock. This way there's no need to change the current 50MHz crystal to make the needed 5.6448MHz master clock.
The project compiled to occupy about 80% of the logic resources so there isn't much more room to add extra features. However, the Fmax of the design is currently 54MHz so with the 5.65MHz requirement for a single voice, a 9 note polyphonic version could be produced.
I used the boards J4 IO9 connection to get MIDI information in. This connector also provdes 5V and GND to power the necessary MIDI IN opto-isolator.
The audio comes from DAC A (left) and DAC B (right) on connecto J5. A DC blocking capacitor should be used on these outputs as the zero value sits at 1.65V.
Converter cables were made to go from the headers to 5 Pin DIN for MIDI input and from the headers to phono for the audio outs.
The 4 slide switches select the MIDI address. SW0 is the LSB. The LEDs light to indicate the address too. All four switches off is Channel 1. LED 0 shows the GATE time of a note and LED 1 shows MIDI activity. If needed RESET is achieved by pressing BTN West.
There are some default parameters on boot up programmed in the VHDL code so it will make sounds. However, to change the sound I needed to program some MIDI controllers to send the appropriate MIDI controller data for the FPGA to decode. Fortunately I have two Phil Rees C16 MIDI controllers to hand.
By using the controller setup program from Phil Rees I was able to load my custom patches to the controllers.
OK that's all well and good now where's the code?
FPGA Additive Synth 766kb.
This was created using WebPack 8.2i. If you have WebPack 8.1i you may need to upgrade. In the zip are all the VHDL and Verilog files needed as well as some project files. You will need to do a full compile if you want all the information from this project. I've only included the necessary files to reduce the bulk of the project as a download. There is also a compiled .bit file for direct FPGA programming and a .mcs file for Xilinx XCF04s programming.
To control the synth over MIDI you need to look at the MIDI Implementation Chart 32kb.
A big thank-you goes to Eric Brombaugh for letting me use his Verilog SPI DAC code. Also this is proof that you can mix Verilog and VHDL in one design!
Comments and suggestions welcome!